delay instruction


delay instruction
команда такта задержки

English-Russian dictionary on household appliances. 2014.

Смотреть что такое "delay instruction" в других словарях:

  • Branch Delay Instruction — In der Rechnerarchitektur ist eine Branch Delay Instruction ein Maschinenbefehl, der direkt einem bedingtem Verzweigungsbefehl folgt und unabhängig davon, ob die Verzweigung genommen wurde oder nicht, immer ausgeführt wird. Die Position eines… …   Deutsch Wikipedia

  • Delay slot — In computer architecture, a delay slot is an instruction slot that gets executed without the effects of a preceding instruction. The most common form is a single arbitrary instruction located immediately after a branch instruction on a RISC or… …   Wikipedia

  • Instruction pipeline — Pipelining redirects here. For HTTP pipelining, see HTTP pipelining. Basic five stage pipeline in a RISC machine (IF = Instruction Fetch, ID = Instruction Decode, EX = Execute, MEM = Memory access, WB = Register write back). In the fourth clock… …   Wikipedia

  • Instruction set — An instruction set, or instruction set architecture (ISA), is the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception… …   Wikipedia

  • Branch Delay Slot — In der Rechnerarchitektur ist eine Branch Delay Instruction ein Maschinenbefehl, der direkt einem bedingtem Verzweigungsbefehl folgt und unabhängig davon, ob die Verzweigung genommen wurde oder nicht, immer ausgeführt wird. Die Position eines… …   Deutsch Wikipedia

  • Reduced instruction set computer — The acronym RISC (pronounced risk ), for reduced instruction set computing, represents a CPU design strategy emphasizing the insight that simplified instructions which do less may still provide for higher performance if this simplicity can be… …   Wikipedia

  • Electronic Delay Storage Automatic Calculator — (EDSAC) was an early British computer. The machine, having been inspired by John von Neumann s seminal First Draft of a Report on the EDVAC , was constructed by Maurice Wilkes and his team at the University of Cambridge Mathematical Laboratory in …   Wikipedia

  • Explicitly parallel instruction computing — (EPIC) is a term coined in 1997 by the HP Intel alliance [cite web url = http://www.hpl.hp.com/techreports/1999/HPL 1999 111.pdf title = EPIC: An Architecture for Instruction Level Parallel Processors accessdate = 2008 05 08 last = Schlansker and …   Wikipedia

  • Flexible Architecture for Simulation and Testing — The FAST Project is a new hybrid hardware prototyping platform enabled by integrating a variety of hardware components on a printed circuit board (PCB) to implement Chip Multiprocessor (CMP) or Multiprocessor (MP) systems. The Flexible… …   Wikipedia

  • computer — computerlike, adj. /keuhm pyooh teuhr/, n. 1. Also called processor. an electronic device designed to accept data, perform prescribed mathematical and logical operations at high speed, and display the results of these operations. Cf. analog… …   Universalium

  • Classic RISC pipeline — In the history of computer hardware, some early reduced instruction set computer central processing units (RISC CPUs) used a very similar architectural solution, now called a classic RISC pipeline. Those CPUs were: MIPS, SPARC, Motorola 88000,… …   Wikipedia


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